D12320VF25V Datasheet, PDF (470/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 12 Serial Communication Interface (SCI)
12.2 Register Descriptions
12.2.1 Receive Shift Register (RSR)
Bit
:
7
6
5
4
3
2
1
0
R/W : —
—
—
—
—
—
—
—
RSR is a register used to receive serial data.
The SCI sets serial data input from the RxD pin in RSR in the order received, starting with the
LSB (bit 0), and converts it to parallel data. When one byte of data has been received, it is
transferred to RDR automatically.
RSR cannot be directly read or written to by the CPU.
12.2.2 Receive Data Register (RDR)
Bit
:
7
6
5
4
3
2
1
0
Initial value :
0
0
0
0
0
0
0
0
R/W
:R
R
R
R
R
R
R
R
RDR is a register that stores received serial data.
When the SCI has received one byte of serial data, it transfers the received serial data from RSR to
RDR where it is stored, and completes the receive operation. After this, RSR is receive-enabled.
Since RSR and RDR function as a double buffer in this way, continuous receive operations can be
performed.
RDR is a read-only register, and cannot be written to by the CPU.
RDR is initialized to H'00 by a reset, and in standby mode or module stop mode.
Rev.7.00 Feb. 14, 2007 page 436 of 1108
REJ09B0089-0700