D12320VF25V Datasheet, PDF (238/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 7 Data Transfer Controller
7.3.7 Block Transfer Mode
In block transfer mode, one operation transfers one block of data. Either the transfer source or the
transfer destination is designated as a block area.
The block size is 1 to 256. When the transfer of one block ends, the initial state of the block size
counter and the address register specified as the block area is restored. The other address register
is then incremented, decremented, or left fixed.
From 1 to 65,536 transfers can be specified. Once the specified number of transfers have ended, a
CPU interrupt is requested.
Table 7.8 lists the register information in block transfer mode and figure 7.8 shows the memory
map in block transfer mode.
Table 7.8 Register Information in Block Transfer Mode
Name
DTC source address register
DTC destination address register
DTC transfer count register AH
DTC transfer count register AL
DTC transfer count register B
Abbreviation
SAR
DAR
CRAH
CRAL
CRB
Function
Designates transfer source address
Designates destination address
Holds block size
Block size counter
Transfer counter
Rev.7.00 Feb. 14, 2007 page 204 of 1108
REJ09B0089-0700