D12320VF25V Datasheet, PDF (451/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 11 Watchdog Timer
11.1.3 Pin Configuration
Table 11.1 describes the WDT output pin.
Table 11.1 WDT Pin
Name
Symbol I/O
Function
Watchdog timer overflow
WDTOVF^* Output Outputs counter overflow signal in watchdog
timer mode
Note: * The WDTOVF function is not available in the F-ZTAT versions.
11.1.4 Register Configuration
The WDT has three registers, as summarized in table 11.2. These registers control clock selection,
WDT mode switching, and the reset signal.
Table 11.2 WDT Registers
Name
Timer control/status register
Abbreviation
TCSR
R/W Initial Value
R/(W)^*3 H'18
Address^*1
Write^*2 Read
H'FFBC H'FFBC
Timer counter
Reset control/status register
TCNT
RSTCSR
R/W H'00
R/(W)^*3 H'1F
H'FFBC H'FFBD
H'FFBE H'FFBF
Notes: 1. Lower 16 bits of the address.
2. For details of write operations, see section 11.2.4, Notes on Register Access.
3. Only a write of 0 is permitted to bit 7, to clear the flag.
Rev.7.00 Feb. 14, 2007 page 417 of 1108
REJ09B0089-0700