D12320VF25V Datasheet, PDF (688/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 17 ROM
• The RxD1 and TxD1 pins should be pulled up on the board.
• Before branching to the programming control program (RAM area H'FFE400 to H'FFFBFF),
the chip terminates transmit and receive operations by the on-chip SCI (channel 1) (by clearing
the RE and TE bits in SCR to 0), but the adjusted bit rate value remains set in BRR. The
transmit data output pin, TxD1, goes to the high-level output state (P31DDR = 1, P31DR = 1).
The contents of the CPU’s internal general registers are undefined at this time, so these
registers must be initialized immediately after branching to the programming control program.
In particular, since the stack pointer (SP) is used implicitly in subroutine calls, etc., a stack area
must be specified for use by the programming control program.
Initial settings must also be made for the other on-chip registers.
• Boot mode can be entered by making the pin settings shown in table 17.30 and executing a
reset-start.
Boot mode can be cleared by driving the reset pin low, waiting at least 20 states, then setting
the mode pins, and executing reset release*¹. Boot mode can also be cleared by a WDT
overflow reset.
Do not change the mode pin input levels in boot mode.
• If the mode pin input levels are changed (for example, from low to high) during a reset, the
state of ports with multiplexed address functions and bus control output pins (AS, RD, HWR)
will change according to the change in the microcomputer’s operating mode*².
Therefore, care must be taken to make pin settings to prevent these pins from becoming output
signal pins during a reset, or to prevent collision with signals outside the microcomputer.
Notes: 1. Mode pins input must satisfy the mode programming setup time (t_MDS = 200 ns) with
respect to the reset release timing.
2. See section 8, I/O Ports.
17.15.2 User Program Mode
When set to user program mode, the chip can program and erase its flash memory by executing a
user program/erase control program. Therefore, on-board reprogramming of the on-chip flash
memory can be carried out by providing an on-board means to supply programming data, and
storing a program/erase control program in part of the program area if necessary.
To select user program mode, select a mode that enables the on-chip flash memory (mode 6 or 7).
In this mode, on-chip supporting modules other than flash memory operate as they normally
would in modes 6 and 7.
Rev.7.00 Feb. 14, 2007 page 654 of 1108
REJ09B0089-0700