D12320VF25V Datasheet, PDF (661/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

φ
VCC
FWE
MD2 to MD0^*1
RES
SWE bit
Section 17 ROM
Wait time: x
Programming/
erasing
possible
Wait time: 100 μs
t_OSC1
Min 0 μs
tMDS^*3
SWE set
SWE cleared
Period during which flash memory access is prohibited
(x: Wait time after setting SWE bit)^*2
Period during which flash memory can be programmed
(Execution of program in flash memory prohibited, and data reads other than verify operations
prohibited)
Notes: 1. Except when switching modes, the level of the mode pins (MD2 to MD0) must be fixed until
power-off by pulling the pins up or down.
2. See section 20.3.6, Flash Memory Characteristics.
3. Mode programming setup time tMDS (min) = 200 ns
Figure 17.31 Power-On/Off Timing (User Program Mode)
Rev.7.00 Feb. 14, 2007 page 627 of 1108
REJ09B0089-0700