D12320VF25V Datasheet, PDF (177/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 6 Bus Controller
6.2 Register Descriptions
6.2.1 Bus Width Control Register (ABWCR)
Bit
:
Modes 5 to 7
Initial value :
R/W
:
7
ABW7
1
R/W
6
ABW6
1
R/W
5
ABW5
1
R/W
4
ABW4
1
R/W
3
ABW3
1
R/W
2
ABW2
1
R/W
1
ABW1
1
R/W
0
ABW0
1
R/W
Mode 4
Initial value :
0
0
0
0
0
0
0
0
R/W
: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
ABWCR is an 8-bit readable/writable register that designates each area for either 8-bit access or
16-bit access.
ABWCR sets the data bus width for the external memory space. The bus width for on-chip
memory and internal I/O registers is fixed regardless of the settings in ABWCR.
After a reset and in hardware standby mode, ABWCR is initialized to H'FF in modes 5 to 7,* and
to H'00 in mode 4. It is not initialized in software standby mode.
Note: * Modes 6 and 7 are not provided in the ROMless version.
Bits 7 to 0—Area 7 to 0 Bus Width Control (ABW7 to ABW0): These bits select whether the
corresponding area is to be designated for 8-bit access or 16-bit access.
Bit n
ABWn
0
1
Description
Area n is designated for 16-bit access
Area n is designated for 8-bit access
(n = 7 to 0)
Rev.7.00 Feb. 14, 2007 page 143 of 1108
REJ09B0089-0700