D12320VF25V Datasheet, PDF (431/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 10 8-Bit Timers
When use of an external clock is selected, three types of count can be selected: at the rising edge,
the falling edge, and both rising and falling edges.
Some functions differ between channel 0 and channel 1.
Bit 2 Bit 1 Bit 0
CKS2 CKS1 CKS0 Description
0
0
0
Clock input disabled
(Initial value)
1
Internal clock, counted at falling edge of φ/8
1
0
Internal clock, counted at falling edge of φ/64
1
Internal clock, counted at falling edge of φ/8192
1
0
0
For channel 0: count at TCNT1 overflow signal^*
For channel 1: count at TCNT0 compare match A^*
1
External clock, counted at rising edge
1
0
External clock, counted at falling edge
1
External clock, counted at both rising and falling edges
Note: * If the count input of channel 0 is the TCNT1 overflow signal and that of channel 1 is the
TCNT0 compare match signal, no incrementing clock is generated. Do not use this setting.
10.2.5 Timer Control/Status Registers 0 and 1 (TCSR0, TCSR1)
TCSR0
Bit
:
7
6
5
4
3
CMFB CMFA OVF ADTE OS3
Initial value :
0
0
0
0
0
R/W
: R/(W)^* R/(W)^* R/(W)^* R/W
R/W
2
OS2
0
R/W
1
OS1
0
R/W
0
OS0
0
R/W
TCSR1
Bit
:7
6
5
4
CMFB CMFA OVF
—
Initial value :
0
0
0
1
R/W
: R/(W)^* R/(W)^* R/(W)^*
—
3
OS3
0
R/W
Note: * Only 0 can be written to bits 7 to 5, to clear these flags.
2
OS2
0
R/W
1
OS1
0
R/W
0
OS0
0
R/W
Rev.7.00 Feb. 14, 2007 page 397 of 1108
REJ09B0089-0700