D12320VF25V Datasheet, PDF (56/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 1 Overview
Type
Symbol
Bus control WAIT
16-bit timer-
pulse unit
(TPU)
TCLKD to
TCLKA
TIOCA0,
TIOCB0,
TIOCC0,
TIOCD0
TIOCA1,
TIOCB1
TIOCA2,
TIOCB2
TIOCA3,
TIOCB3,
TIOCC3,
TIOCD3
TIOCA4,
TIOCB4
TIOCA5,
TIOCB5
8-bit timer
TMO0,
TMO1
TMCI0,
TMCI1
TMRI0,
TMRI1
Pin No.
TFP-100B,
TFP-100G FP-100A TLP-113V I/O
Name and Function
74
76
B10
Input Wait: Requests insertion of a wait
state in the bus cycle when accessing
external 3-state access space.
6, 4, 2, 1 8, 6, 4, 3 D3, D1,
C1, B1
Input Clock input D to A: These pins input
an external clock.
99, 100,
1, 2
1 to 4
B2, A2, I/O
B1, C1
Input capture/ output compare match
A0 to D0: The TGR0A to TGR0D input
capture input or output compare
output, or PWM output pins.
3, 4
5, 6
C4, D1 I/O Input capture/ output compare match
A1 and B1: The TGR1A and TGR1B
input capture input or output compare
output, or PWM output pins.
5, 6
7, 8
C2, D3 I/O Input capture/ output compare match
J8, H11, J10, G11A2 and B2: The
TGR2A and TGR2B input capture
input or output compare output, or
PWM output pins.
54 to 56, 59 56 to 58, J8, H11, I/O
61
J10, G11
Input capture/ output compare match
A3 to D3: The TGR3A to TGR3D input
capture input or output compare
output, or PWM output pins.
89, 90
91, 92 D6, D5 I/O Input capture/ output compare match
A4 and B4: The TGR4A and TGR4B
input capture input or output compare
output, or PWM output pins.
91, 92
93, 94 A5, B6
I/O
Input capture/ output compare match
A5 and B5: The TGR5A and TGR5B
input capture input or output compare
output, or PWM output pins.
91, 92
93, 94 A5, B6
Output Compare match output: The compare
match output pins.
59, 90
61, 92
G11, D5
Input
Counter external clock input: Input
pins for the external clock input to the
counter.
56, 89
58, 91
J10, D6
Input Counter external reset input: The
counter reset input pins.
Rev.7.00 Feb. 14, 2007 page 22 of 1108
REJ09B0089-0700