D12320VF25V Datasheet, PDF (580/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 14 A/D Converter (8 Analog Input Channel Version)
Table 14.4 A/D Conversion Time (Single Mode)
CKS1 = 0
CKS1 = 1
CKS = 0
CKS = 1
CKS = 0
CKS = 1
Item
Symbol Min Typ Max Min Typ Max Min Typ Max Min Typ Max
A/D conversion tD
start delay
18 — 33 4 — 5 10 — 17 6 — 9
Input sampling tSPL
time
— 127 — — 15 — — 63 — — 31 —
A/D conversion tCONV
time
515 — 530 67 — 68 259 — 266 131 — 134
Note: Values in the table are the number of states.
Table 14.5 A/D Conversion Time (Scan Mode)
CKS1
0
1
CKS
0
1
0
1
Conversion Time (States)
512 (Fixed)
64 (Fixed)
256 (Fixed)
128 (Fixed)
14.4.4 External Trigger Input Timing
A/D conversion can be externally triggered. When the TRGS1 and TRGS0 bits are set to B'11 in
ADCR, external trigger input is enabled at the ADTRG pin. A falling edge at the ADTRG pin sets
the ADST bit to 1 in ADCSR, starting A/D conversion. Other operations, in both single and scan
modes, are the same as when the ADST bit has been set to 1 by software. Figure 14.6 shows the
timing.
Rev.7.00 Feb. 14, 2007 page 546 of 1108
REJ09B0089-0700