English
Language : 

D12320VF25V Datasheet, PDF (324/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
Section 8 I/O Ports
8.11.3 Pin Functions
Port F pins also function as bus control signal input/output pins (AS, RD, HWR, LWR, WAIT,
BREQ, BACK, BREQO, CS4, and CS5) the system clock (φ) output pin and interrupt input pins
(IRQ0 to IRQ3). The pin functions differ between modes 4 to 6*1, and mode 7*1. Port F pin
functions are shown in table 8.20.
Table 8.20 Port F Pin Functions
Pin
PF7/φ
Selection Method and Pin Functions
The pin function is switched as shown below according to bit PF7DDR.
PF7DDR
0
1
Pin function
PF7 input pin
φ output pin
PF6/AS
The pin function is switched as shown below according to the operating mode,
and bit PF6DDR, and bit ASOD in PFCR2.
Operating
Mode
Modes
4 to 6*1
Mode 7*1
ASOD
0
1
—
PF6DDR
—
0
1
0
1
Pin function
AS output PF6 input PF6 output PF6 input PF6 output
pin
pin
pin
pin
pin
PF5/RD
The pin function is switched as shown below according to the operating mode
and bit PF5DDR.
Operating
Mode
Modes
4 to 6*1
Mode 7*1
PF5DDR
—
0
1
Pin function
RD output pin
PF5 input pin
PF5 output pin
PF4/HWR
The pin function is switched as shown below according to the operating mode
and bit PF4DDR.
Operating
Mode
Modes
4 to 6*1
Mode 7*1
PF4DDR
—
0
1
Pin function
HWR output pin
PF4 input pin
PF4 output pin
Rev.7.00 Feb. 14, 2007 page 290 of 1108
REJ09B0089-0700