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D12320VF25V Datasheet, PDF (261/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
Section 8 I/O Ports
8.2.3 Pin Functions
Port 1 pins also function as TPU I/O pins (TCLKA, TCLKB, TCLKC, TCLKD, TIOCA0,
TIOCB0, TIOCC0, TIOCD0, TIOCA1, TIOCB1, TIOCA2, and TIOCB2) and address output pins
(A23 to A20). Port 1 pin functions are shown in table 8.3.
Table 8.3 Port 1 Pin Functions
Pin
P17/TIOCB2/
TCLKD
Selection Method and Pin Functions
The pin function is switched as shown below according to the combination of
the TPU channel 2 setting by bits MD3 to MD0 in TMDR2, bits IOB3 to IOB0 in
TIOR2, bits CCLR1 and CCLR0 in TCR2, bits TPSC2 to TPSC0 in TCR0 and
TCR5, and bit P17DDR.
TPU Channel
2 Setting
Table Below (1)
Table Below (2)
P17DDR
—
0
1
Pin function
TIOCB2 output
P17 input P17 output
TIOCB2 input *1
TCLKD input *2
TPU Channel
2 Setting
(2)
(1)
(2)
(2)
(1)
(2)
MD3 to MD0 B'0000, B'01×× B'0010
B'0011
IOB3 to IOB0 B'0000 B'0001 to —
B'0100 B'0011
B'1××× B'0101 to
B'0111
B'××00 Other than B'××00
CCLR1,
CCLR0
—
—
—
—
Other B'10
than B'10
Output
function
—
Output
—
compare
output
—
PWM
—
mode 2
output
×: Don’t care
Notes: 1. TIOCB2 input when MD3 to MD0 = B'0000 or B'01×× and IOB3 = 1.
2. TCLKD input when the setting for either TCR0 or TCR5 is: TPSC2
to TPSC0 = B'111.
TCLKD input when channels 2 and 4 are set to phase counting
mode (MD3 to MD0 = B'01××).
Rev.7.00 Feb. 14, 2007 page 227 of 1108
REJ09B0089-0700