D12320VF25V Datasheet, PDF (140/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 4 Exception Handling
4.5 Trap Instruction
Trap instruction exception handling starts when a TRAPA instruction is executed. Trap instruction
exception handling can be executed at all times in the program execution state.
The TRAPA instruction fetches a start address from a vector table entry corresponding to a vector
number from 0 to 3, as specified in the instruction code.
Table 4.4 shows the status of CCR and EXR after execution of trap instruction exception handling.
Table 4.4 Status of CCR and EXR after Trap Instruction Exception Handling
Interrupt Control Mode
I
0
1
2
1
Legend:
1: Set to 1
0: Cleared to 0
—: Retains value prior to execution.
CCR
UI
—
—
I2 to I0
—
—
EXR
T
—
0
4.6 Stack Status after Exception Handling
Figure 4.4 shows the stack after completion of trap instruction exception handling and interrupt
exception handling.
SP
CCR
PC
(24 bits)
SP
EXR
Reserved*
CCR
PC
(24 bits)
(a) Interrupt control mode 0
Note: * Ignored on return.
(b) Interrupt control mode 2
Figure 4.4 Stack Status after Exception Handling (Advanced Modes)
Rev.7.00 Feb. 14, 2007 page 106 of 1108
REJ09B0089-0700