D12320VF25V Datasheet, PDF (478/1146 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 12 Serial Communication Interface (SCI)
Bits 1 and 0—Clock Enable 1 and 0 (CKE1, CKE0): These bits are used to select the SCI clock
source and enable or disable clock output from the SCK pin. The combination of the CKE1 and
CKE0 bits determines whether the SCK pin functions as an I/O port, the serial clock output pin, or
the serial clock input pin.
The setting of the CKE0 bit, however, is only valid for internal clock operation (CKE1 = 0) in
asynchronous mode. The CKE0 bit setting is invalid in synchronous mode, and in the case of
external clock operation (CKE1 = 1). Set CKE1 and CKE0 before determining the SCI operating
mode with SMR.
For details of clock source selection, see table 12.9.
Bit 1
CKE1
0
Bit 0
CKE0
0
Description
Asynchronous mode
Internal clock/SCK pin functions as I/O port^*1
Synchronous mode
Internal clock/SCK pin functions as serial clock
output
1
Asynchronous mode
Internal clock/SCK pin functions as clock output^*2
Synchronous mode
Internal clock/SCK pin functions as serial clock
output
1
0
Asynchronous mode
External clock/SCK pin functions as clock input^*3
Synchronous mode
External clock/SCK pin functions as serial clock
input
1
Asynchronous mode
External clock/SCK pin functions as clock input^*3
Synchronous mode
External clock/SCK pin functions as serial clock
input
Notes: 1. Initial value
2. Outputs a clock of the same frequency as the bit rate.
3. Inputs a clock with a frequency 16 times the bit rate.
Rev.7.00 Feb. 14, 2007 page 444 of 1108
REJ09B0089-0700