82598EB Datasheet, PDF (96/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - PCIe
Bits
R/W
0
RW1C
1
RW1C
2
RW1C
3
RW1C
4
RO
5
RO
15:6
RO
Default
Description
0b
Correctable Detected. Indicates status of correctable error detection.
0b
Non-Fatal Error Detected. Indicates status of non-fatal error detection.
0b
Fatal Error Detected. Indicates status of fatal error detection.
0b
Unsupported Request Detected. Indicates that the 82598 received an unsupported
request. This field is identical in all functions. the 82598 can’t distinguish which function
causes the error.
0b
Aux Power Detected. If Aux Power is detected, this field is set to 1b. It is a strapping
signal from the periphery and is identical for all functions. Resets on LAN Power Good,
internal power on reset, and PE_RST_N only.
0b
Transaction Pending. Indicates whether the 82598 has ANY transactions pending.
(Transactions include completions for any outstanding non-posted request for all used
traffic classes).
0x00
Reserved.
Link CAP – 4 Byte, Offset 0xAC, (RO) – This register identifies PCIe link-specific capabilities. This is a
read-only register identical to all functions.
Bits
3:0
R/W
RO
9:4
RO
Default
0001b
0x08
Description
Supported Link Speeds. This field indicates the supported Link speed(s) of the
associated link port.
Defined encodings are:
0001b = 2.5 Gb/s Link speed supported.
0010b = 5 Gb/s and 2.5 Gb/s Link speeds supported.
Max Link Width. Indicates the maximum link width. The 82598 supports a x1, x2, x4
and x8-link width. This field is loaded from the EEPROM PCIe init configuration 3 Word
0x1A with a default value of eight lanes.
Defined encoding:
000000b = Reserved
000001b = x1
000010b = x2
000100b = x4
001000b = x8
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