82598EB Datasheet, PDF (327/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Register Descriptions
4.4.3.5.7 Split Receive Control Registers – SRRCTL (0x02100 – 0x0213C; RW)
Field
BSIZEPACKET
Reserved
Bit(s)
Initial
Value
6:0
0x2
7
0b
Description
Receive Buffer Size for Packet Buffer
The value is in 1 kB resolution. Value can be from 1 kB to 16 kB. Default buffer
size is 2 kB.
This field should not be set to 0x0.
RXCTRL.DMBYPS should be set to 1b to bypass the descriptor monitor
functionality.
Reserved.
Should be written with 0b to ensure future compatibility.
BSIZEHEADER1
13:8
0x4
Receive Buffer Size for Header Buffer
The value is in 64 bytes resolution. Value can be from 64 bytes to 1024 bytes.
Default buffer size is 256 bytes. This field must be greater than zero if the value
of DESCTYPE is greater or equal to two.
Values above 1024 bytes are reserved for internal use only.
NOTE: BSIZEHEADER must be bigger than zero if DESCTYPE is equal to 010b,
011b 100b or 101b.
Reserved
DESCTYPE
24:14
27:25
0x0
000b
Reserved
Define the descriptor type in RX.
000b = legacy
001b = Advanced descriptor one buffer
010b = Advanced descriptor header splitting
011b = Reserved
100b = Reserved
101b = Advanced descriptor header splitting
always use header buffer.
110b – 111b = Reserved.
Reserved
31:28
0x0
Reserved
Should be written with 0x0 to ensure future compatibility.
4.4.3.5.8 Rx DCA Control Register – DCA_RXCTRL (0x02200 – 0x0223C; RW)
Field
CPUID
Bit(s)
Initial
Value
Description
4:0
0x0
Physical ID
In Front Side Bus (FS)B platforms, the software device driver, after discovering
the physical CPU ID and CPU Bus ID, programs it into these bits for hardware to
associate physical CPU and bus ID with the adequate RSS queue. Bits 2:1 are
Target Agent ID, bit 3 is the Bus ID. Bits 2:0 are copied into bits 3:1 in the TAG
field of the TLP headers of PCIe messages.
In CSI platforms, the software device driver programs a value, based on the
relevant APIC ID, corresponding to the adequate RSS queue. This value is
copied in the 4:0 bits of the DCA Preferences field in TLP headers of PCIe
messages.
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