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82598EB Datasheet, PDF (24/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet
Intel® 82598EB 10 GbE Controller - PCIe Interface
Table 2-2. Reserved and No-Connect Definitions
Name
No Connect (NC)
Reserved No Connect (RSVD_NC)
Reserved 1P2 (RSVD_1P2)
Reserved VSS (RSVD_VSS)
Definition
These package balls are not connected.
These package balls are connected, but are reserved for internal use. They should be
left floating on the board-level design.
These package balls are connected, but are reserved for internal use. They should be
connected to 1.2 V_LAN on the board-level design.
These package balls are connected, but are reserved for internal use. They should be
connected to GND on the board-level design.
2.2
PCIe Interface
Table 2-3. PCIe Signal and Pin Information
Signal
PE_CLKP
PE_CLKN
PET_0_P
PET_0_N
PET_1_P
PET_1_N
PET_2_P
PET_2_N
PET_3_P
PET_3_N
PET_4_P
PET_4_N
PET_5_P
PET_5_N
PET_6_P
PET_6_N
Pin
Number
Type
AJ28
AK28
A-in
AH29
AH30
A-out
AE29
AE30
A-out
AB29
AB30
A-out
W29
W30
A-out
N29
N30
A-out
K29
A-out
K30
G29
G30
A-out
Name and Function
PCIe Differential Reference Clock In. A 100 MHz differential clock input. This
clock is used as the reference clock for the PCIe Tx/Rx circuitry and by the
PCIe core PLL to generate clocks for the PCIe core logic.
PCIe Serial Data Output. A serial differential output pair running at 2.5 Gb/s.
This output carries both data and an embedded 2.5 GHz clock that is
recovered along with data at the receiving end.
PCIe Serial Data Output. A serial differential output pair running at 2.5 Gb/s.
This output carries both data and an embedded 2.5 GHz clock that is
recovered along with data at the receiving end.
PCIe Serial Data Output. A serial differential output pair running at 2.5 Gb/s.
This output carries both data and an embedded 2.5 GHz clock that is
recovered along with data at the receiving end.
PCIe Serial Data Output. A serial differential output pair running at 2.5 Gb/s.
This output carries both data and an embedded 2.5 GHz clock that is
recovered along with data at the receiving end.
PCIe Serial Data Output. A serial differential output pair running at 2.5 Gb/s.
This output carries both data and an embedded 2.5 GHz clock that is
recovered along with data at the receiving end.
PCIe Serial Data Output. A serial differential output pair running at 2.5 Gb/s.
This output carries both data and an embedded 2.5 GHz clock that is
recovered along with data at the receiving end.
PCIe Serial Data Output. A serial differential output pair running at 2.5 Gb/s.
This output carries both data and an embedded 2.5 GHz clock that is
recovered along with data at the receiving end.
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