82598EB Datasheet, PDF (281/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - DCA
Table 3-79. Packet Reception Decision Table
Is packet
802.1q?
No
Yes
VLNCTRL.
VME
X
0b
VLNCTRL.
VFE
X
0b
Yes
0b
1b
Yes
1b
0b
Yes
1b
1b
ACTION
Normal packet reception
Receive a VLAN packet if it passes the standard MAC
address filters (only). Leave the packet as received in
the data buffer. VP bit in receive descriptor is cleared.
Receive a VLAN packet if it passes the standard filters
and the VLAN filter table. Leave the packet as received in
the data buffer (the VLAN tag would not be stripped). VP
bit in receive descriptor is cleared.
Receive a VLAN packet if it passes the standard filters
(only). Strip off the VLAN information (four bytes) from
the incoming packet and store in the descriptor. Sets VP
bit in receive descriptor.
Receive a VLAN packet if it passes the standard filters
and the VLAN filter table. Strip off the VLAN information
(four bytes) from the incoming packet and store in the
descriptor. Sets VP bit in receive descriptor.
Note: A packet is defined as a VLAN/802.1q packet if its Type field matches the VET.
3.5.6 DCA
3.5.6.1 Description
Direct Cache Access (DCA) is a method to improve network I/O performance by placing some posted
inbound writes directly within CPU cache. DCA potentially eliminates cache misses due to inbound
writes.
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