82598EB Datasheet, PDF (309/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Register Descriptions
Field
ADDR
START
WRITE
EEBUSY
CFG_DONE
Reserved
DONE
Bit(s) Initial Value
Description
14:0
0x0
Address
This field is written by manageability along with Start Read or Start Write to
indicate which EEPROM address to read or write.
15
0b
Start
Writing a 1b to this bit causes the EEPROM to start the read or write operation
according to the write bit.
16
0b
Write
This bit signals the EEPROM if the current operation is read or write.
0b = Read.
1b = Write.
17
0b
EPROM Busy
This bit indicates that the EEPROM is busy processing an EEPROM transaction
and should not be accessed.
18
0b
Manageability Configuration Cycle is Complete
This bit indicates that the manageability configuration cycle (configuration of
PCIe and core) is complete. This bit is set to 1b by manageability firmware to
indicate configuration is complete and cleared by hardware on any of the reset
sources that caused the firmware to initialize the PHY. Writing a 0b by firmware
does not affect the state of this bit.
Note: Software should not try to access the PHY for configuration before this bit
is set.
30:19
0x0
Reserved
31
1b
Transaction Done
This bit is cleared after the Start Write or Start Read bit is set by manageability
and is set back again when the EEPROM write or read transaction completes.
4.4.3.2.5 Manageability EEPROM Read/Write Data – EEMNGDATA (0x10114; RW)
This register can be read/written by manageability firmware and is read-only to host software.
Field
WRDATA
RDDATA
Bit(s)
Initial
Value
Description
15:0
0x0
Write Data
Data to be written to the EEPROM.
31:16 X
Read Data
Data returned from the EEPROM read.
Note: This field is read only.
4.4.3.2.6 Manageability Flash Control Register – FLMNGCTL (0x10118; RW)
This register can be read/written by manageability firmware and is read-only to host software.
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