82598EB Datasheet, PDF (184/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Hardware EEPROM Sections
3.4.3.6.3 SWAP Configuration – Offset 2
Bit
15:1
4
Name
Swap_Rx_Lane_0
13:1
2
Swap_Rx_Lane_1
11:1
0
Swap_Rx_Lane_2
9:8
Swap_Rx_Lane_3
7:6
Swap_Tx_Lane_0
5:4
Swap_Tx_Lane_1
3:2
Swap_Tx_Lane_2
1:0
Swap_Tx_Lane_3
Default
Description
00b
Determines which port lane is mapped to MAC Rx lane 0.
00b = Port rx lane 0 to MAC Rx lane 0.
01b = Port rx lane 1 to MAC Rx lane 0.
10b = Port rx lane 2 to MAC Rx lane 0.
11b = Port rx lane 3 to MAC Rx lane 0.
Mapped to SERDESC.swap_rx_lane_0.
01b
Determines which port lane is mapped to MAC Rx lane 1.
Mapped to SERDESC.swap_rx_lane_1.
10b
Determines which port lane is mapped to MAC Rx lane 2.
Mapped to SERDESC.swap_rx_lane_2.
11b
Determines which port lane is mapped to MAC Rx lane 3.
Mapped to SERDESC.swap_rx_lane_3.
00b
Determines the port destination tx lane for MAC Tx lane 0.
00b = MAC tx lane 0 to port Tx lane 0.
01b = MAC tx lane 0 to port Tx lane 1.
10b = MAC tx lane 0 to port Tx lane 2.
11b = MAC tx lane 0 to port Tx lane 3.
Mapped to SERDESC.swap_tx_lane_0.
01b
Determines the port destination tx lane for MAC Tx lane 1.
Mapped to SERDESC.swap_tx_lane_1.
10b
Determines the port destination tx lane for MAC Tx lane 2.
Mapped to SERDESC.swap_tx_lane_2.
11b
Determines the port destination tx lane for MAC Tx lane 3.
Mapped to SERDESC.swap_tx_lane_3.
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