82598EB Datasheet, PDF (360/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Register Descriptions
4.4.3.9.15 Priority XOFF Transmitted Count – PXOFFTXC (0x03F20 – 0x03F3C; R)
Field
PXOFFTXC
Bit(s)
Initial
Value
Description
31:0
0x0
Number of XOFF packets transmitted.
This register counts the number of XOFF packets received per user priority. XOFF packets can use the
global address, or the station address.
4.4.3.9.16 Priority XOFF Received Count – PXOFFRXC (0x0CF20 – 0x0CF2C; R)
Field
PXOFFRXC
Bit(s)
Initial
Value
Description
31:0
0x0
Number of XOFF packets received.
This register counts the number of XOFF packets transmitted per user priority. These can be either due
to queue fullness, or due to software initiated action (using SWXOFF).
4.4.3.9.17 Packets Received (64 Bytes) Count – PRC64 (0x0405C; R)
Field
PRC64
Bit(s)
Initial
Value
Description
31:0
0x0
Number of packets received that are 64 bytes in length.
This register counts the number of good packets received that are exactly 64 bytes (from <Destination
Address> through <CRC>, inclusively) in length. Packets that are counted in the Missed Packet Count
register are not counted in this register. This register does not include received flow control packets and
increments only if receives are enabled.
4.4.3.9.18 Packets Received (65-127 Bytes) Count – PRC127 (0x04060; R)
Field
PRC127
Bit(s)
Initial
Value
Description
31:0
0
Number of packets received that are 65-127 bytes in length.
This register counts the number of good packets received that are 65-127 bytes (from <Destination
Address> through <CRC>, inclusively) in length. Packets that are counted in the Missed Packet Count
register are not counted in this register. This register does not include received flow control packets and
increments only if receives are enabled.
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