82598EB Datasheet, PDF (568/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Connecting the Serial EEPROM
8.3.2.10 Power and Ground Planes
Good grounding requires minimizing inductance levels in the interconnections and keeping ground
returns short, signal loop areas small, and locating decoupling capacitors at or near power inputs to
bypass to the signal return. This will significantly reduce EMI radiation.
The following guidelines help reduce circuit inductance in both backplanes and motherboards:
• Route traces over a continuous plane with no interruptions. Do not route over a split power or
ground plane. If there are vacant areas on a ground or power plane, avoid routing signals over
the vacant area. This will increase inductance and increase EMI radiation levels.
• Use distance and/or extra decoupling capacitors to separate noisy digital grounds from analog
grounds to reduce coupling. Noisy digital grounds may affect sensitive DC subsystems.
• All ground vias should be connected to every ground plane; and every power via should be
connected to all power planes at equal potential. This helps reduce circuit inductance.
• Physically locate grounds between a signal path and its return. This will minimize the loop area.
• Avoid fast rise/fall times as much as possible. Signals with fast rise and fall times contain many
high frequency harmonics, which can radiate EMI.
• Do not route high-speed signals near switching regulator circuits.
8.4
Connecting the Serial EEPROM
The controller uses an Serial Peripheral Interface (SPI)* EEPROM. Several words of the EEPROM are
accessed automatically by the device after reset to provide pre-boot configuration data before it is
accessed by host software. The remainder of the EEPROM space is available to software for storing the
MAC address, serial numbers, and additional information. For a complete description of the content
stored in the EEPROM please consult the NVM Map section of this document.
8.4.1 Supported EEPROM devices
Table 8-2 lists the SPI EEPROMs that have been found to work satisfactorily with the 82598 device. The
SPI EEPROMs used must be rated for a clock rate of at least 2 MHz.
Table 8-2. Supported SPI EEPROM Devices
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