82598EB Datasheet, PDF (60/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - PCIe
3.1.1.4.1 Transaction Types Accepted
Table 3-2. Transaction Types Accepted by the Transaction Layer
Transaction Type
FC Type
TX Later
Reaction
Hardware Should Keep Data
From Original Packet
For Client
Configuration Read
Request
NPH
CPLH + CPLD
Requester ID, TAG, Attribute
Configuration Space
Configuration Write
Request
NPH +
NPD
CPLH
Requester ID, TAG, Attribute
Configuration Space
Memory Read Request NPH
CPLH + CPLD
Requester ID, TAG, Attribute
CSR
Memory Write Request PH + PD
–
–
CSR
I/O Read Request
NPH
CPLH + CPLD
Requester ID, TAG, Attribute
CSR
I/O Write Request
NPH +
NPD
CPLH
Requester ID, TAG, Attribute
CSR
Read Completions
CPLH +
–
–
CPLD
DMA
Message
PH
–
–
Message Unit/INT/ PM/Error
Unit
Legend:
• PH – Posted Request Headers
• PD – Posted Request Data Payload
• NPH – Non-Posted Request Headers
• NPD – Non-Posted Request Data Payload
• CPLH – Completion Headers
• CPLD – Completion Data Payload
3.1.1.4.1.1 Partial Memory Read and Write Requests
The 82598 has limited support for read and write requests with only part of the byte enable bits set:
• Partial writes with at least one byte enabled are executed as full writes. Any side effect of a full
write (such as clear by write) is also applicable to partial writes.
• Zero-length writes have no internal impact (nothing written, no effect such as clear-by-write).
The transaction is treated as a successful operation (no error event).
• Partial reads with at least one byte enabled must be answered as a full read. Any side effect of
the full read (such as clear by read) is also applicable to partial reads.
• Zero-length reads generate a completion, but the register is not accessed and undefined data is
returned.
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