82598EB Datasheet, PDF (357/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Register Descriptions
4.4.3.9.3 Error Byte Count – ERRBC (0x04008; R)
Field
ERRBC
Bit(s)
Initial
Value
31:0
0x0
Error Byte Count
Description
Counts the number of receive packets with Error bytes (an error symbol in the packet). This register
counts all packets received, not just packets that are directed to the 82598.
4.4.3.9.4 MAC Short Packet Discard Count – MSPDC (0x04010; R)
Field
MSPDC
Bit(s)
Initial
Value
Description
31:0
0x0
Number of MAC short packet discard packets received.
4.4.3.9.5 Missed Packets Count – MPC (0x03FA0 – 0x03FBC; R)
Field
MPC
Bit(s)
Initial
Value
31:0
0x0
Missed Packets Count
Description
This counter counts the number of missed packets per packet buffer. Packets are missed when the
receive FIFO has insufficient space to store the incoming packet. This could be caused because of too
few buffers allocated, or because there is insufficient bandwidth on the IO bus. This register does not
increment if receives are not enabled.
4.4.3.9.6 MAC Local Fault Count – MLFC (0x04034; R)
Field
MLFC
Bit(s)
Initial
Value
Description
31:0
0x0
Number of faults in the local MAC.
Note: For proper counting this statistics should be cleared after link up.
Note: This statistics field is only valid when the link speed is 10 Gb/s.
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