82598EB Datasheet, PDF (7/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Contents
4.4.3.12 DCA Control Registers .................................................................................... 391
4.4.3.13 MAC Registers ............................................................................................... 392
5. System Manageability.............................................................................................................. 417
5.1 Pass-Through (PT) Functionality ................................................................................................... 417
5.2 Components of a Sideband Interface ............................................................................................ 418
5.3 SMBus Pass-Through Interface..................................................................................................... 419
5.3.1 General ....................................................................................................................... 419
5.3.2 Pass-Through Capabilities .............................................................................................. 419
5.3.2.1 Packet Filtering ............................................................................................. 419
5.3.3 Pass-Through Multi-Port Modes ....................................................................................... 420
5.3.3.1 Automatic Ethernet ARP Operation ................................................................... 420
5.3.3.2 Manageability Receive Filtering ........................................................................ 420
5.3.4 SMBus Transactions ...................................................................................................... 429
5.3.4.1 SMBus Addressing ......................................................................................... 430
5.3.4.2 SMBus ARP Functionality ................................................................................ 430
5.3.4.3 Concurrent SMBus Transactions....................................................................... 434
5.3.5 SMBus Notification Methods ............................................................................................ 434
5.3.5.1 SMBus Alert and Alert Response Method ........................................................... 435
5.3.5.2 Asynchronous Notify Method ........................................................................... 436
5.3.5.3 Direct Receive Method .................................................................................... 436
5.3.6 1 MHz SMBus Support ................................................................................................... 437
5.3.7 Receive TCO Flow.......................................................................................................... 437
5.3.8 Transmit TCO Flow ........................................................................................................ 438
5.3.8.1 Transmit Errors in Sequence Handling .............................................................. 438
5.3.8.2 TCO Command Aborted Flow ........................................................................... 439
5.3.9 SMBus ARP Transactions ................................................................................................ 439
5.3.9.1 Prepare to ARP .............................................................................................. 439
5.3.9.2 Reset Device (General)................................................................................... 440
5.3.9.3 Reset Device (Directed) .................................................................................. 440
5.3.9.4 Assign Address .............................................................................................. 440
5.3.9.5 Get UDID (General and Directed)..................................................................... 441
5.3.10 SMBus Pass-Through Transactions................................................................................... 443
5.3.10.1 Write Transactions ......................................................................................... 443
5.3.10.2 Read Transactions (82598EB to BMC)............................................................... 450
5.3.11 LAN Fail-Over in LAN Teaming Mode ................................................................................ 463
5.3.11.1 Fail-Over Functionality.................................................................................... 463
5.3.11.2 Fail-Over Configuration................................................................................... 464
5.3.11.3 Fail-Over Register .......................................................................................... 465
5.3.12 SMBus Troubleshooting Guide ......................................................................................... 467
5.3.12.1 TCO Alert Line Stays Asserted After a Power Cycle ............................................. 467
5.3.12.2 SMBus Commands are Always NACK'd by the 82598EB ....................................... 467
5.3.12.3 SMBus Clock Speed is 16.6666 KHz.................................................................. 468
5.3.12.4 A Network Based Host Application is not Receiving any Network Packets ............... 468
5.3.12.5 Status Registers ............................................................................................ 468
5.3.12.6 Unable to Transmit Packets from the BMC ......................................................... 469
5.3.12.7 SMBus Fragment Size..................................................................................... 469
5.3.12.8 Enable XSum Filtering .................................................................................... 470
5.3.12.9 Still Having Problems? .................................................................................... 470
5.3.13 Sample Configurations ................................................................................................... 471
5.4 NC-SI Interface ......................................................................................................................... 480
5.4.1 Overview ..................................................................................................................... 481
5.4.1.1 Terminology.................................................................................................. 481
5.4.1.2 System Topology ........................................................................................... 482
5.4.1.3 Data Transport .............................................................................................. 483
5.4.2 NC-SI Support .............................................................................................................. 485
5.4.2.1 Supported Features ....................................................................................... 485
5.4.2.2 NC-SI Mode - Intel Specific Commands............................................................. 490
5.4.3 Basic NC-SI Workflows................................................................................................... 525
5.4.3.1 Package States.............................................................................................. 525
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