82598EB Datasheet, PDF (439/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - SMBus ARP Transactions
Table 5-3. Flag Options During Transmit Packet Transactions
Previous
Last
Last
Current
First
Not First
Not Last
First
Not Last
Not First
Action/Notes
Accept both.
Error for the current transaction. Current transaction is discarded and an abort status
is asserted.
Error in previous transaction. Previous transaction (until previous First) is discarded.
Current packet is processed.
No abort status is asserted.
Process the current transaction.
Note:
Since every other Block Write command in TCO protocol has both F and L flags off, they cause
flushing any pending transmit fragments that were previously received. When running the
TCO transmit flow, no other Block Write transactions are allowed in between the fragments.
5.3.8.2 TCO Command Aborted Flow
The 82598EB indicates to the BMC an error or an abort condition by setting the TCO Abort bit in the
general status. 82598EB might also be configured to send a notification to the BMC (see
Section 5.3.10.1.3.3).
Following is a list of possible error and abort conditions:
• Any error in the SMBus protocol (NACK, SMBus timeouts, etc.).
• Any error in compatibility between required protocols to specific functionality (for example, RX
Enable command with a byte count not equal to 1/14, as defined in the command specification).
• If 82598EB does not have space to store the transmitted packet from the BMC (in its internal
buffer space) before sending it to the link, the packet is discarded and the external BMC is
notified via the Abort bit.
• Error in the F/L bit sequence during multi-fragment transactions.
• An internal reset to 82598EB's firmware.
5.3.9 SMBus ARP Transactions
Note: All SMBus ARP transactions include the PEC byte.
5.3.9.1 Prepare to ARP
This command clears the Address Resolved flag (set to false). It does not affect the status or validity of
the dynamic SMBus address and is used to inform all devices that the ARP master is starting the ARP
process:
1
7
1
1
8
1
8
1
1
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