82598EB Datasheet, PDF (459/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - SMBus Pass-Through Transactions
Table 5-14. Status Data Byte 2 (Bits 2 and 1)
Previous
Don’t Care
00b
10b
11b
01b
Don’t Care
Don’t Care
Current
00b
01b
01b
01b
01b
11b
10b
Description
Interrupt is not pending (OK).
New interrupt is asserted (OK).
New interrupt is asserted (OK).
Interrupt is waiting for reading (OK).
Interrupt is waiting for reading by the driver for more than one read
cycle (not OK).
Possible drive hang state.
Previous interrupt was read and current interrupt is pending (OK).
Interrupt is not pending (OK).
Note: The BMC reads should consider the time it takes for the LAN device driver to deal with the
interrupt (in s). Note that excessive reads by the BMC can give false indications.
5.3.10.2.3 Get System MAC Address
The Get System MAC Address returns the system MAC address over to the SMBus. This command is a
single-fragment Read Block transaction that returns the following data:
Note: This command returns the MAC address configured in EEEPROM offset 0.
The format is as follows:
Function
Get System MAC Address
Command
0xD4
Data returned from 82598EB:
Function
Get System MAC
Address
Byte
Count
Data 1
(Op-Code)
Data 2
…
7
0xD4
MAC Address
…
MSB
Data 7
MAC
Address
LSB
5.3.10.2.4 Read Configuration
This command can be used by the BMC to read the CSR’s from the manageability firmware.
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