82598EB Datasheet, PDF (299/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Register Descriptions
4.4.3.1.2 Device Status Register – STATUS (0x00008; R)
Field
Reserved
Bit(s)
Initial
Value
1:0
0b
LAN ID
3:2
0b
Reserved
18:4
0b
PCIe Master Enable 19
1b
Status
Reserved
31:2
0b
0
Description
Reserved
Read as 0b.
LAN ID. Provides software a mechanism to determine the device LAN identifier
for this MAC. Read as: [0,0] LAN 0, [0,1] LAN 1.
Reserved
This is a status bit of the appropriate CTRL.GIO Master Disable bit.
1b = Associated LAN function can issue master requests.
0b = Associated LAN function does not issue any master request and all
previously issued requests are complete.
Reserved
Reads as 0b.
4.4.3.1.3 Extended Device Control Register – CTRL_EXT (0x00018; RW)
Field
Reserved
NS_DIS
RO_DIS
Reserved
DRV_LOAD
Reserved
Bit(s)
Initial
Value
Description
15:0
0b
Reserved
16
0b
No Snoop Disable
When set to 1b, the 82598 does not set the no-snoop attribute in any PCIe
packet, independent of PCIe configuration and the setting of individual no-
snoop enable bits. When set to 0b, behavior of no-snoop is determined by
PCIe configuration and the setting of individual no-snoop enable bits.
17
0b
Relaxed Ordering Disable. When set to 1b, the 82598 does not request any relaxed
ordering transactions in PCIe mode regardless of the state of bit 1 in the PCIe command
register. When this bit is clear and bit 1 of the PCIe command register is set, the 82598
requests relaxed ordering transactions as described in Section 4.4.3.5.8 and
Section 4.4.3.12.1 (per queue and per flow).
27:18
0b
Reserved
28
0b
Driver loaded and the corresponding network interface is enabled.
This bit should be set by the software device driver after it was loaded and
cleared when it unloads or at PCIe soft reset. The BMC loads this bit as an
indication that the software device driver successfully loaded to it.
31:29
0b
Reserved
Reads as 0b.
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