82598EB Datasheet, PDF (340/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Register Descriptions
4.4.3.6.10 Multicast Control Register – MCSTCTRL (0x05090, RW)
Field
Reserved
MFE
MO
Bit(s)
31:3
2
1:0
Initial
Value
Description
0x0
Reserved
0b
Multicast Filter Enable
0b = Disabled (filter is not applied – all multicast packets are not accepted).
1b = Enabled.
00b
Multicast Offset
This determines which bits of the incoming multicast address are used in looking
up the bit vector.
00b = [47:36].
01b = [46:35].
10b = [45:34].
11b = [43:32].
4.4.3.6.11 Multiple Receive Queues Command Register MRQC (0x05818; RW)
Field
RSS Enable
Reserved
RSS Field
Enable
Bit(s)
Initial
Value
Description
0
0b
RSS Enable
When set, enables Receive Side Scaling (RSS) operation.
0b = RSS disabled.
1b = RSS enabled.
15:1
0x0
Reserved
31:16
0x0
Each bit, when set, enables a specific field selection to be used by the hash function.
Several bits can be set at the same time.
Bit[16] = Enable TcpIPv4 hash function.
Bit[17] = Enable IPv4 hash function.
Bit[18] = Enable TcpIPv6Ex hash function.
Bit[19] = Reserved.
Bit[20] = Enable IPv6 hash function.
Bit[21] = Enable TcpIPv6 hash function.
Bit[22] = Enable UdpIPv4.
Bit[23] = Enable UdpIPv6.
Bit[24] = Enable UdpIPv6Ext.
Bits[31:25] = Reserved (0x0).
Note: Disabling RSS on the fly is not allowed. Model usage is to reset the 82598 after disabling RSS.
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