82598EB Datasheet, PDF (112/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Non-Volatile Memory (EEPROM/Flash)
3.1.3.1.1 Software Accesses
The 82598 provides two different methods for software access to the EEPROM. It can either use the
built-in controller to read the EEPROM or access the EEPROM directly using the EEPROM’s 4-wire
interface.
Software can use the EEPROM Read register (EERD) to cause the 82598 to read a word from the
EEPROM that the software can then use. To do this, software writes the address to read into the Read
Address field (EERD.ADDR; bits 15:2) and simultaneously writes a 1b to the Start Read bit
(EERD.START; bit 0). The 82598 then reads the word from the EEPROM, sets the Read Done bit
(EERD.DONE; bit 1), and puts the data in the Read Data field (EERD.DATA; bits 31:16). Software can
poll the EEPROM Read register until it sees the Read Done bit set, then use the data from the Read Data
field. Any words read this way are not written to the 82598’s internal registers.
Software can also directly access the EEPROM’s 4-wire interface through the EEPROM/Flash Control
register (EEC). It can use this for reads, writes, or other EEPROM operations.
To directly access the EEPROM, software should follow these steps:
1. Write a 1b to the EEPROM Request bit (EEC.EE_REQ; bit 6).
2. Read the EEPROM Grant bit (EEC.EE_GNT; bit 7) until it becomes 1b. It remains 0b as long as the
hardware is accessing the EEPROM.
3. Write or read the EEPROM using the direct access to the 4-wire interface as defined in the EEPROM/
Flash Control & Data register (EEC). The exact protocol used depends on the EEPROM placed on the
board and can be found in the appropriate datasheet.
4. Write a 0b to the EEPROM Request bit (EEC.EE_REQ; bit 6).
Each time the EEPROM is not valid (blank EEPROM or wrong signature), software should use the direct
access to the EEPROM through the EEC register.
3.1.3.1.2 Signature Field
The only way the 82598 can discover whether an EEPROM is present is by trying to read the EEPROM.
The 82598 first reads the EEPROM Control Word at address 0x0. The 82598 checks the signature value
for bits 7 and 6. If bit 7 is 0b and bit 6 is 1b, it considers the EEPROM to be present and valid and reads
additional EEPROM words and programs its internal registers based on the values read. Otherwise, it
ignores the values it read from that location and does not read any other words.
3.1.3.1.3 Protected EEPROM Space
The 82598 provides to the host a mechanism for a hidden area in the EEPROM. The hidden area cannot
be accessed via the EEPROM registers in the CSR space. It can be accessed only by the Manageability
(MNG) subsystem. For more information on the MNG subsystem, refer to the Intel® 82598 10 GbE
Controller System Manageability Interface application note.
After the EEPROM is configured to be protected, changing bits that are protected require specific
manageability instructions with authentication mechanism. This mechanism is defined in the Intel®
82598 10 GbE Controller System Manageability Interface application note.
3.1.3.1.3.1 Initial EEPROM Programming
In most applications, initial EEPROM programming is done directly on the EEPROM pins. Nevertheless, it
is desirable to enable existing software utilities (accessing the EEPROM via the host interface) to initially
program the whole EEPROM without breaking the protection mechanism. Following a power-up
sequence, the 82598 reads the hardware initialization words in the EEPROM. If the signature in word
0x0 does not equal 01b the EEPROM is assumed as non-programmed. There are two effects for non-
valid signature:
• The 82598 stops reading EEPROM data and sets the relevant registers to default values.
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