82598EB Datasheet, PDF (341/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Register Descriptions
4.4.3.6.12 VMDq Control Register – VMD_CTL (0x0581C; RW)
Field
VMDq Enable
VMDq Filter
Bit(s)
0
1
Initial
Value
Description
0b
VMDq Enable
When set, enables VMDq operation.
0b = VMDq disabled.
1b = VMDq enabled.
0b
VMDq Filter
Determines the filtering mode used for VMDq filtering:
0b = MAC filtering.
1b = Reserved.
This bit has no impact when VMDq is disabled.
Reserved
3:2
00b
Default VMDq
7:4
0x0
output index
Reserved
31:8
0x0
Reserved
Default VMDq output index
Determines the VMDq output index for received packets that cannot be classified by
the VMDq procedures (such as broadcast packets).
Reserved
4.4.3.6.13 Immediate Interrupt Rx IMIR (0x05A80 + 4*n[n=0..7], RW)
This register defines the filtering that determines which packet triggers a dynamic interrupt
moderation.
Field
PORT
PORT_IM_E
N
PORT_BP
Reserved
Bit(s)
15:0
16
17
31:18
Initial
Value
0x0
0b
0b
0
Description
Destination TCP Port
This field is compared with the destination TCP port in incoming packets.
The port value should be configured to the register in host order.
Destination TCP Port Enable
Allows issuing an immediate interrupt if all the following three conditions are met:
• Packet TCP destination port is equal to Port field
• Packet length of incoming packet is smaller than Size_Thresh in Im_IMIREXT
register
• At least one of the TCP control bits of incoming packets is set and the
corresponding bit in the CtrlBit field in the IMIREXT register is set.
Port Bypass
When 1b, the TCP port check is bypassed and only other conditions are checked.
When 0b, the TCP port is checked to fit to Port field.
Reserved
341