82598EB Datasheet, PDF (544/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - DC Specifications
7.5
DC Specifications
7.5.1 Digital I/O
Table 7-10. Digital I/O DC Specification
Symbol
Parameter
Conditions
Min
Max
Units
Note
VOH
Output High
Voltage
IOH = -16mA; VCC3P3 = Min
2.4
V dc
VOL
Output Low
Voltage
IOL = 10mA; VCC=Min
0.4
V dc
VOLled
LED Output Low
Voltage
IOL = 12mA; VCC3P3 = Min
0.4
V dc
VIH
Input High Voltage
2.0
VCC3P3 +
V dc
1
0.3
VIL
Input Low Voltage
-0.3
0.8
V dc
1
Iil
Input Current
VCC3P3 = Max; VI =3.6V/GND
15
μA
IOFF
Current at IDDQ
Mode
50
μA
3
PU
Internal Pull Up
3
8
K
2,3,4,
5
Ipup
Internal Pull Up
Current
0-0.5*VCC3P3[V]
0.43
1
mA
6, 7
Built-in Hysteresis
100
400
mV
Cin
Pin Capacitance
Not measured, only characterized
3
7
pF
Cload
Load Capacitance
Timing characterized with this load
0
16
pF
Note:
1. The input buffer also has hysteresis > 80 mV.
2. Internal pull-up maximum was characterized at slow corner (110 °C, VCC3P3=min, process slow)
3. Internal pull-up minimum was characterized at fast corner (0 °C, VCC3P3=max, process fast).
4. External R pull-down recommended  400 .
5. External R pull-up recommended  3 K.
6. External buffer recommended strength  2 mA.
7. Internal pull-up maximum current consumption was characterized at fast corner (0 °C, VCC3P3=max, process fast) Internal
pull-up minimum current consumption was characterized at slow corner (110 °C, VCC3P3=min, process slow).
The previous table applies to PE_RST_N, LED0[3:0], LED1[3:0], POR_BYPASS, Internal Power On Reset,
LAN_PWR_GOOD, MAIN_PWR_OK, JTCK, JTDI, JTDO, JTMS, JRST_N, SDP0[3:0], SDP1[3:0], FLSH_SI, FLSH_SO,
FLSH_SCK, FLSH_CE_N, EE_DI, EE_DO, EE_SK, EE_CS_N.
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