82598EB Datasheet, PDF (135/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Software Initialization and Diagnostics
The following should be done once per receive queue:
• Allocate a region of memory for the receive descriptor list.
• Receive buffers of appropriate size should be allocated and pointers to these buffers should be
stored in the descriptor ring.
• Program the descriptor base address with the address of the region.
• Set the length register to the size of the descriptor ring.
• Program SRRCTL associated with this queue according to the size of the buffers and the required
header control.
• If Header Split or Header Replication is required for this queue, the appropriate PSRTYPE must be
programmed for the appropriate headers as follows:
—Program SRRCTL with appropriate values including the Queue Enable bit.
—Set 0b into the tail pointer.
—Poll the Queue Enable bit and make sure that the queue is enabled (read RxDCTL.Qx.25 and
make sure it is set).
—Disable the queue by writing to RxDCTL.Qx.25 = 0b (make sure the descriptor count in the DBU
is cleared).
—Poll the Queue Enable bit and make sure that the queue is disabled (read RxDCTL.Qx.25 and
make sure it is cleared).
—Enable the queue by writing to RxDCTL.Qx.25 = 1b.
—Poll the Queue Enable bit and make sure that the queue is enabled (read RxDCTL.Qx.25 and
make sure it is set).
• Program RXDCTL with appropriate values including the Queue Enable bit.
• Program the tail pointer to enable the fetch of descriptors
Note: Packets to a disabled queue are dropped.
3.2.3.2.6 Dynamic Enabling and Disabling of Receive Queues
Receive queues can be enabled or disabled dynamically if the following procedure is followed.
1. Enabling:
a. Follow the per queue initialization described in the previous section.
2. Disabling:
a. Disable the direction of packets to this queue.
b. Disable the queue by clearing the enable bit in RXDCTL. The 82598 stops fetching and writing
back descriptors from this queue. Any further packet that is directed to this queue is dropped.
If a packet is being processed, the 82598 completes the current buffer write if the packet spreads
over more than one buffer. All subsequent buffers are not written.
c. The 82598 clears the RXDCTL.ENABLE bit only after all pending memory accesses to the
descriptor ring are done. The software device driver should poll this bit and then wait an
additional amount of time (> 100 s) before releasing the memory allocated to this queue.
There might be additional packets in the receive packet buffer targeted to the disabled queue. The
arbitration might be such that it would take a long time to drain down those packets. If software re-
enables a queue before all packets to that queue were drained, the enabled queue might potentially get
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