82598EB Datasheet, PDF (248/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Transmit Functionality
maintains a list of descriptors with the RS bit set, it can look at them to determine if all packets up to
(and including) the one with the RS bit set have been buffered in the output FIFO. Looking at the status
byte and checking the Descriptor Done (DD) bit do this. If DD is set, the descriptor has been processed.
Note: The VLE, IFCS, CSO, and IC fields should be set in the first descriptor for each packet
transmitted.
IFCS
When set, the hardware appends the MAC FCS at the end of the packet. When it is cleared, software
should calculate the FCS for proper CRC check. There are several cases in which software must set IFCS
as follows:
• Transmission of short packet while padding is enabled by the HLREG0.TXPADEN bit
• Checksum offload is enabled by the IC bit in the TDESC.CMD
• VLAN header insertion enabled by the VLE bit in the TDESC.CMD
• Large send or TCP/IP checksum offload using context descriptor
VLE indicates that the packet is a VLAN packet (hardware should add the VLAN Ether type and an
802.1q VLAN tag to the packet).
Table 3-65. VLAN Tag Insertion Decision Table for VLAN Mode Enabled
VLE
0
1
Action
Send generic Ethernet packet.
Send 802.1Q packet; the Ethernet Type field comes from the VET register and the VLAN data comes from the VLAN
field of the TX descriptor.
Rsvd – Reserved (4)
Status – STA (4)
Table 3-66. Transmit Status (TDESC.STA) Layout
3
2
1
0
Reserved
DD
DD (bit 0) – Descriptor Done Status
This bit provides transmit status, when RS is set in the command. DD indicates that the descriptor is
done and is written back after the descriptor has been processed.
When head write-back is enabled, the descriptor write-back is not (with RS set).
VLAN (16)
The VLAN field is used to provide the 802.1q/802.1ac tagging information. The VLAN field is qualified
on the first descriptor of each packet when the VLE bit is set to 1b.
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