82598EB Datasheet, PDF (94/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - PCIe
Bits
3:0
7:4
8
13:9
15:14
Default
0010b
0000b
0b
00000b
00b
R/W
RO
RO
RO
RO
RO
Description
Capability Version. Indicates the PCIe capability structure version. The 82598 supports
both version 1 and version 2 as loaded from the PCIe Capability Version bit in the
EEPROM.
Device/Port Type. Indicates the type of PCIe functions. All functions are native PCI
functions with a value of 0000b.
Slot Implemented. The 82598 does not implement slot options. Therefore, this field is
hardwired to 0b.
Interrupt Message Number. The 82598 does not implement multiple MSI per function. As
a result, this field is hardwired to 0x0.
Reserved.
Device CAP – 4 Byte, Offset 0xA4, (RO) – This register identifies the PCIe device specific capabilities.
It is a read-only register with the same value for the two LAN functions and to all other functions.
Bits
2:0
4:3
5
8:6
11:9
12
13
14
15
17:16
25:18
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Default
001b
00b
0b
011b
110b
0b
0b
0b
1b
00b
0x00
Description
Max Payload Size Supported. This field indicates the maximum payload that the 82598
can support for TLPs. It is loaded from the EEPROM with a default value of 256 bytes.
Reserved.
Extended Tag Field Supported. Maximum supported size of the Tag field. The 82598
supports a 5-bit Tag field for all functions.
Endpoint L0s Acceptable Latency. This field indicates the acceptable latency that the
82598 can withstand due to the transition from L0s state to the L0 state. All functions
share the same value loaded from the EEPROM PCIe Init Configuration 1 bits [8:6].
A value of 011b equals 512 ns.
Endpoint L1 Acceptable Latency. This field indicates the acceptable latency that the
82598 can withstand due to the transition from L1 state to the L0 state.
The 82598 does not support ASPM L1.
A value of 110b equals 32 μs-64 μs.
Attention Button Present. Hardwired in the 82598 to 0b for all functions.
Attention Indicator Present. Hardwired in the 82598 to 0b for all functions.
Power Indicator Present. Hardwired in the 82598 to 0b for all functions.
Role Based Error Reporting. Hardwired in the 82598 to 1b for all functions.
Reserved, should be set to 00b.
Slot Power Limit Value. Used in upstream ports only. Hardwired in the 82598 to 0x00 for
all functions.
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