82598EB Datasheet, PDF (386/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Register Descriptions
Func1 Power State
7:6
00b
Reserved
Func0 Aux_En
LAN0 Valid
5:4
00b
3
0b
2
0b
Func0 Power State
1:0
00b
1. This bit is initiated from the EEPROM.
Power state indication of function 1.
00b -> DR.
01b -> D0u.
10b -> D0a.
11b -> D3.
Reserved
Function 0 Auxiliary (AUX) Power PM Enable bit shadow from the configuration
space.
LAN 0 Enable
When this bit is 0b, it indicates that the LAN 0 function is disabled. When the
function is enabled, the bit is 1b.
This bit reflects if the function is disabled through the external pad.
Power state indication of function 0
00b -> DR.
01b -> D0u.
10b -> D0a.
11b -> D3.
4.4.3.11.6 PCIe Analog Configuration Register – PCIEANACTL (0x11040; RW)
This register is for use by the device hardware for configuring analog circuits in the PCIe block.
Field
Done Indication
Reserved
Target
Address
Data
Bit(s)
Initial
Value
31
1
30:20
0
19:16
0
15:8
0
7:0
0
Description
When a write operation completes, this bit is set to 1b indicating that new data
can be written. This bit is over written to 0b by new data.
Reserved
Analog target to the configuration.
0000b = Lane 0
0001b = Lane 1
0010b = Lane 2
0011b = Lane 3
0100b = Lane 4
0101b = Lane 5
0110b = Lane 6
0111b = Lane 7
1000b = All lanes
1001b = SCC PLL
1010b:1111b – Reserved
Address to PCIe Analog registers.
Data to PCIe Analog registers.
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