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82598EB Datasheet, PDF (328/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet
Intel® 82598EB 10 GbE Controller - Register Descriptions
RX Descriptor DCA
5
0b
EN
RX Header DCA EN
6
0b
Reserved
7
0b
RXdescReadNSEn
8
0b
RXdescReadROEn
9
1b
RXdescWBNSen
10
0b
RXdescWBROen
11
RXdataWriteNSEn
12
0b
(RO)
1b
RXdataWriteROEn
13
1b
RxRepHeaderNSEn
14
0b
RxRepHeaderROEn
Reserved
15
1b
31:16
0x0
Descriptor DCA EN
When set, hardware enables DCA for all Rx descriptors written back into
memory. When cleared, hardware does not enable DCA for descriptor write-
backs.
Rx Header DCA EN
When set, hardware enables DCA for all received header buffers. When cleared,
hardware does not enable DCA for Rx header.
Reserved
Rx Descriptor Read No-Snoop Enable
This bit must be reset to 0b to ensure correct functionality (except if the
software device driver can guarantee the data is present in the main memory
before the DMA process occurs (the software device driver has written the data
with a write-through instruction).
Rx Descriptor Read Relax Order Enable
Rx Descriptor Write Back No-Snoop Enable
Note: This bit must be reset to 0b to ensure correct functionality of the
descriptor write-back.
Rx Descriptor Write Back Relax Order Enable
This bit must be 0b to allow correct functionality of the descriptors write-back.
Rx Data Write No Snoop Enable
When 0b, the last bit of the Packet Buffer Address field in advanced receive
descriptor is used as least significant bit of the packet buffer address (A0), thus
enabling 8-bit alignment of the buffer.
When 1b, the last bit of the Packet Buffer Address field in advanced receive
descriptor is used as No-Snoop Enabling (NSE) bit. In this case, the buffer is
16-bit aligned. In this case, (bit set to 1b), the NSE bit determines whether the
data buffer is snooped or not.
Rx Data Write Relax Order Enable
Rx Split Header No-Snoop Enable
This bit must be reset to 0b to enable correct functionality of a header write to
host memory.
Rx Split Header Relax Order Enable
Reserved
The Rx data write no-snoop is activated when the NSE bit is set in the receive descriptor.
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