82598EB Datasheet, PDF (26/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - XAUI Interface Signals
2.3
XAUI Interface Signals
Table 2-4. Signal and Pin Information
Signal
RBIAS
RSENSE
Pin
Number
AG2
AF1
Type
B
REFCLKIN_P
REFCLKIN_N
AK3
AJ3
A-in
Name and Function
• RBIAS Resistor. A 6.5 K resistor must be connected between RBIAS and
GND for proper operation. This resistor generates internal bias currents.
• RSENSE is an internal sense point and must be connected to the ground
connection of the 6.5 K RBias resistor, as close to the package as
possible.
External Reference Clock Input. Must be connected to a 156.25 MHz +/-
0.005% (+/- 50 ppm) clock source.
If an external clock is to be applied, it must be 156.25 MHz +/-0.005% (+/- 50
ppm). Adequate board layout is required to avoid clock waveform reflections
and glitches.
RX0_L3_P
RX0_L3_N
RX0_L2_P
RX0_L2_N
RX0_L1_P
RX0_L1_N
RX0_L0_P
RX0_L0_N
TX0_L3_P
TX0_L3_N
TX0_L2_P
TX0_L2_N
TX0_L1_P
TX0_L1_N
TX0_L0_P
TX0_L0_N
RX1_L3_P
RX1_L3_N
AJ23
AK23
AJ24
AK24
AJ25
AK25
AJ26
AK26
AJ18
AK18
AJ19
AK19
AJ20
AK20
AJ21
AK21
AJ10
AK10
A-in
A-in
A-in
A-in
A-out
A-out
A-out
A-out
A-in
XAUI serial data input for port 0. A serial differential input pair running at up to
3.125 Gb/s. An embedded clock present in this input is recovered along with
the data.
XAUI serial data input for port 0. A serial differential input pair running at up to
3.125 Gb/s. An embedded clock present in this input is recovered along with
the data.
XAUI serial data input for port 0. A serial differential input pair running at up to
3.125 Gb/s. An embedded clock present in this input is recovered along with
the data.
XAUI serial data input for port 0. A serial differential input pair running at up to
3.125 Gb/s. An embedded clock present in this input is recovered along with
the data.
XAUI serial data output for port 0. A serial differential output pair running at up
to 3.125 Gb/s. This output carries both data and an embedded clock that is
recovered along with data at the receiving end.
XAUI serial data output for port 0. A serial differential output pair running at up
to 3.125 Gb/s. This output carries both data and an embedded clock that is
recovered along with data at the receiving end.
XAUI serial data output for port 0. A serial differential output pair running at up
to 3.125 Gb/s. This output carries both data and an embedded clock that is
recovered along with data at the receiving end.
XAUI serial data output for port 0. A serial differential output pair running at up
to 3.125 Gb/s. This output carries both data and an embedded clock that is
recovered along with data at the receiving end.
XAUI serial data input for port 1. A serial differential input pair running at up to
3.125 Gb/s. An embedded clock present in this input is recovered along with
the data.
26