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82598EB Datasheet, PDF (59/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet
Intel® 82598EB 10 GbE Controller - PCIe
3.1.1.3.2.2 Resend Request Enable
• Version = 0x1 – The Completion Timeout Resend EEPROM bit (loaded to the
Completion_Timeout_Resend bit in the PCIe Control (GCR) register enables resending the
request (applies when completion timeout is enabled). The default is to resend a request that
timed out.
• Version = 0x2 – same as Rev. 1.1.
3.1.1.3.2.3 Completion Timeout Period
• Version = 0x1 – Loaded from the Completion Timeout Value field in the EEPROM to the
Completion_Timeout_Value bits in the PCIe Control (GCR) register. The following values are
supported:
—50 μs to 10 ms (default)
—10 ms to 250 ms
—250 ms to 4 s
—4 s to 64 s
• Version = 0x2 – Programmed through the PCI configuration. Visible through the
Completion_Timeout_Value bits in the PCIe Control (GCR) register. The 82598 supports all four
ranges defined by the PCIe ECR:
—50 μs to 10 ms
—10 ms to 250 ms
—250 ms to 4 s
—4 s to 64 s
System software programs a range (one of nine possible ranges that sub-divide the previously
mentioned four ranges) into the PCI configuration register. The supported sub-ranges are:
—50 μs to 50 ms (default).
—50 μs to 100 μs
—1 ms to 10 ms
—16 ms to 55 ms
—65 ms to 210 ms
—260 ms to 900 ms
—1 s to 3.5 s
—s to 13 s
—17 s to 64s
A memory read request for which there are multiple completions is considered complete only when all
completions have been received by the requester. If some but not all requested data is returned before
the completion timeout timer expires, the requestor is permitted to keep or discard data that was
returned prior to expiration.
3.1.1.4 Transaction Layer
The upper layer of the PCIe architecture is the transaction layer. The transaction layer connects to the
82598's core using an implementation-specific protocol. Through this core-to-transaction-layer
protocol, application-specific parts of the 82598 interact with the PCIe subsystem and transmits and
receives requests to or from a remote PCIe agent, respectively.
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