82598EB Datasheet, PDF (383/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Register Descriptions
Completion_
Timeout_Value
Completion_
Timeout_
Resend
Completion_
Timeout_
Disable
Field
PCIe Capability
Version
Reserved
APBACD
hdr_log inversion
Reserved
Reserved
15:12
0000b¹
16
1b¹
17
0b¹
Bit (s)
18
Initial
Value
1b¹
19
0b
20
0b
21
0b
22
1b
23
0b
Indicates the selected value for completion timeout. Decoding of this field
depends on the PCIe capability version:
Capability version 0x1:
0000b = 50 μs to 10 ms (default).
0001b = 10 ms to 250 ms.
0010b = 250 ms to 4 s.
0011b = 4 s to 64 s.
Other = Reserved.
Capability version 0x2:
0000b = 50 μs to 50 ms.
0001b = 50 μs to 100 μs.
0010b = 1 ms to 10 ms.
0011b = Reserved.
0100b = Reserved.
0101b = 16 ms to 55 ms.
0110b = 65 ms to 210 ms.
0111b = Reserved.
1000b = Reserved.
1001b = 260 ms to 900 ms.
1010b = 1 s to 3.5 s.
1011b = Reserved.
1100b = Reserved.
1101b = 4 s to 13 s.
1110b = 17 s to 64 s.
1111b = Reserved.
Note: For Capability Version 2, this field is read only.
When set, enables a resend request after the completion timeout expires.
0b = Do not resend request after completion timeout.
1b = Resend request after completion timeout.
Indicates if the PCIe completion timeout is supported.
0b = Completion timeout enabled.
1b = Completion timeout disabled.
Description
Reports the PCIe capability version supported.
0b = Capability version: 0x1.
1b = Capability version: 0x2.
Reserved
Auto PBA Clear Disable
When set to 0b, PBA entry is cleared on the falling edge of the appropriate
interrupt request to the PCIe block.
If set the header log in error reporting is written as 31:0 to log1, 63:643 in
log2, etc. If not, the header is written as 127:96 in log1, 95:64 in log 2, etc.
Reserved
Must be set to 1b.
Reserved
383