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82598EB Datasheet, PDF (580/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet
Intel® 82598EB 10 GbE Controller - Oscillator Layout Recommendations
Recommended oscillators are:
Table 8-6. Part Numbers for Recommended Oscillators
Valpey Fisher
VF266B-156.250MHZ
Pletronics Inc.
PE7744DV-156.25M
Pericom Semiconductor Corporation
SEL3833B-156.2500T
MMD Components
MI3050LAT3-156.250MHZ-T
8.13.3 Oscillator Layout Recommendations
Oscillators should not be placed near I/O ports or board edges. Noise from these devices may be
coupled onto the I/O ports or out of the system chassis. Oscillators should also be kept away from XAUI
differential pairs to prevent interference.
The reference clock should be routed differentially; use the shortest, most direct traces possible. Keep
potentially noisy traces away from the clock trace. It is critical to place the termination resistors and AC
coupling capacitors as close to the 82598 as possible (less than 250 mils).
8.13.4 Reference Clock Measurement Recommendations
A low capacitance, high impedance probe (C < 1 pF, R > 500 K) should be used for testing. Probing
parameters can affect the measurement of the clock amplitude and cause errors in the adjustment. A
test should be done after the probe has been removed to ensure circuit operation.
8.14 Power Supplies
The controller requires three power rails: 3.3 V dc, 1.8 V dc and 1.2 V dc. A central power supply can
provide all the required voltage sources; or power can be derived from the 3.3 V dc supply and
regulated locally using external regulators. If the LAN wake capability is used, voltages must remain
present during system power down. Local regulation of the LAN voltages from system 3.3 Vmain and
3.3 Vaux voltages is recommended.
Make sure that all the external voltage regulators generate the proper voltage, meet the output current
requirements (with adequate margin), and provide the proper power sequencing. For details, see the
electrical specification section of this document.
8.14.1 Power Supply Sequencing
Due to the current demand, a Switching Voltage Regulator (SVR) is highly recommended for the
1.2 V dc power rail. Regardless of the type of regulator used, all regulators need to adhere to the
sequencing shown in the following figure to avoid latch-up and forward-biased internal diodes
(1.8 V dc must not exceed 3.3 V dc; 1.2 V dc must not exceed 3.3 V dc; 1.2 V dc must not exceed
1.8 V dc).
The power supplies are all expected to ramp during a short power-up internal (recommended interval
20 ms or quicker). The delay between the 1.8 V dc and 1.2 V dc rail, measured at a level of 400 mV, has
to be quicker than 500 s. Do not leave the device in a prolonged state where some, but not all,
voltages are applied.
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