82598EB Datasheet, PDF (372/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Register Descriptions
4.4.3.9.54 Queue Bytes Transmitted Count – QBTC (0x6034+n*0x40[n=0..15]; R)
Field
QBTC
Bit(s)
Initial
Value
Description
31:0
0x0
Number of bytes transmitted for the queue.
4.4.3.10 Management Filter Registers
4.4.3.10.1 Management VLAN TAG Value – MAVTV (0x5010 +4*n[n=0..7]; RW)
Where "n" is the VLAN filter serial number, equal to 0, 1,…7.
MAVTV registers are written by the BMC and are not accessible to the host for writing. The registers are
used to filter manageability packets.
Field
VID
Reserved
Bit(s)
11:0
31:12
Initial
Value
Description
0x0
Contains the VLAN ID that should be compared with the incoming packet if
bit 31 is set.
0x0
Reserved
4.4.3.10.2 Management Flex UDP/TCP Ports – MFUTP (0x5030 + 4*n[n=0..7];
RW)
Where each 32-bit register (n=0,…,7) refers to two port filters (register 0 refers to ports 0 and 1,
register 1 refers to port 2 and 3, etc).
MFUTP registers are written by the BMC and not accessible to the host for writing.
Reset – MFUTP registers are cleared on Internal Power On Reset or LAN_PWR_GOOD only. The initial
values for this register can be loaded from the EEPROM by the management firmware after power-up
reset.
MFUTP registers value should be configured to the register in host order.
Field
MFUTP[2n]
MFUTP[2n+1]
Bit(s)
15:0
31:16
Initial
Value
Description
0x0
(2n)-th management flex UDP/TCP port.
0x0
(2n+1)-th management flex UDP/TCP port.
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