82598EB Datasheet, PDF (329/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Register Descriptions
4.4.3.5.9 Receive DMA Control Register – RDRXCTL (0x02F00; RW)
Field
RDMTS
Reserved
DMAIDONE
Reserved
MVMEN
MCEN
Reserved
RxDPipeSize
Reserved
Bit(s)
Initial
Value
1:0
00b
2
0b
3
0b
4
0b
5
0b
6
0b
7
00x
12:8
0x0
31:13
0x0
Description
Receive Descriptor Minimum Threshold Size
The corresponding interrupt is set each time the fractional number of free
descriptors becomes equal to RDMTS.
00b = 1/2.
01b = 1/4.
10b = 1/8.
11b = Reserved.
Reserved
DMA Init Done
When read as 1b, indicates that the DMA init cycle is done (RO).
Reserved
DMA Configuration for MAC/VLAN (VMDq) Mode Registers Mapping
This mode is enabled when set to 1b.
DMA Configuration for Multiple Cores (RSS) Registers Mapping
This mode is enabled when set to 1b.
Reserved
Receive Data Pipe Size
Limits the amount of pending bytes in the DMA Rx queue (resolution in 1 kB).
Reserved
4.4.3.5.10 Receive Packet Buffer Size – RXPBSIZE (0x03C00 – 0x03C1C; RW)
Field
Reserved
Bit(s)
Initial
Value
9:0
0x0
Reserved
Description
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