82598EB Datasheet, PDF (342/596 Pages) Intel Corporation – Intel® 82598EB 10 Gigabit Ethernet Controller Datasheet

Intel^® 82598EB 10 GbE Controller - Register Descriptions
Another register includes a size threshold and a control bits bitmap to trigger an immediate interrupt.
4.4.3.6.14 Immediate Interrupt Rx Extended IMIREXT (0x05AA0 + 4*n[n=0..7],
RW)
Field
Bit(s)
Size_Thresh 11:0
Size_BP
12
CtrlBit
18:13
CtrlBit_BP
19
Reserved
31:20
Initial
Value
0x0
0b
0x0
0b
0x0
Description
Size Threshold
These 12 bits define a size threshold; a packet with length below this threshold
triggers an interrupt. Enabled by Size_Thresh_en.
Size Bypass
When 1b, the size check is bypassed.
When 0b, the size check is performed.
Control Bit
When a bit in this field is equal to 1b, an interrupt is immediately issued after receiving
a packet with corresponding TCP control bits turned on.
Bit:
13: URG = Urgent pointer field significant.
14: ACK = Acknowledgment field.
15: PSH = Push function.
16: RST = Reset the connection.
17: SYN = Synchronize sequence numbers.
18: FIN = No more data from sender.
Control Bits Bypass
When 1b, the control bits check is bypassed.
When 0b, the control bits check is performed.
Reserved
4.4.3.6.15 Immediate Interrupt Rx VLAN Priority Register IMIRVP (0x05AC0, RW)
Field
Bit(s)
Initial
Value
Description
Vlan_Pri
2:0
000b
VLAN Priority
This field includes the VLAN priority threshold. When Vlan_pri_en is set to 1b, then an
incoming packet with VLAN tag with a priority equal or higher to VlanPri triggers an
immediate interrupt, regardless of the ITR moderation.
Vlan_pri_en
3
0b
VLAN Priority Enable
When 1b, an incoming packet with VLAN tag with a priority equal or higher to Vlan_Pri
triggers an immediate interrupt, regardless of the ITR moderation.
When 0b, the interrupt is moderated by ITR.
Reserved
31:4
0x0
Reserved
342