HD64F3048VTF8 Datasheet, PDF (90/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 2 CPU
2.8 Processing States
2.8.1 Overview
The H8/300H CPU has five processing states: the program execution state, exception-handling
state, power-down state, reset state, and bus-released state. The power-down state includes sleep
mode, software standby mode, and hardware standby mode. Figure 2.11 classifies the processing
states. Figure 2.13 indicates the state transitions.
Processing states
Program execution state
The CPU executes program instructions in sequence
Exception-handling state
A transient state in which the CPU executes a hardware sequence
(saving PC and CCR, fetching a vector, etc.) in response to a reset,
interrupt, or other exception
Bus-released state
The external bus has been released in response to a bus request
signal from a bus master other than the CPU
Reset state
The CPU and all on-chip supporting modules are initialized and halted
Power-down state
The CPU is halted to conserve power
Sleep mode
Software standby mode
Hardware standby mode
Figure 2.11 Processing States
2.8.2 Program Execution State
In this state the CPU executes program instructions in normal sequence.
Rev. 3.00 Sep 27, 2006 page 62 of 872
REJ09B0325-0300