HD64F3048VTF8 Datasheet, PDF (120/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 5 Interrupt Controller
5.1.2 Block Diagram
Figure 5.1 shows a block diagram of the interrupt controller.
NMI
input
IRQ input
OVF
TM....... E
...
ADI
ADIE
ISCR IER
IRQ input
section ISR
IPRA, IPRB
Interrupt
Priority
request
decision logic
Vector
number
Interrupt controller
Legend:
ISCR:
IER:
ISR:
IRQ sense control register
IRQ enable register
IRQ status register
IPRA: Interrupt priority register A
IPRB: Interrupt priority register B
SYSCR: System control register
UE
SYSCR
Figure 5.1 Interrupt Controller Block Diagram
CPU
I
CCR
UI
Rev. 3.00 Sep 27, 2006 page 92 of 872
REJ09B0325-0300