HD64F3048VTF8 Datasheet, PDF (803/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

RAMCR—RAM Control Register
Bit
7
6
5
FLER 

Initial value 0
1
1
Read/Write R/W


Appendix B Internal I/O Register
H'48
Flash memory
4
3
2
1
0
 RAMS RAM2 RAM1 RAM0
1
0
0
0
0

R/W R/W R/W R/W
RAM select, RAM 2 to RAM 0
Bit 3 Bit 2 Bit 1 Bit 0
RAMS RAM 2 RAM 1 RAM 0
0
1/0 1/0 1/0
1
0
0
0
1
1
0
1
1
0
0
1
1
0
1
RAM Area
H'FFF000 to H'FFF1FF
H'01F000 to H'01F1FF
H'01F200 to H'01F3FF
H'01F400 to H'01F5FF
H'01F600 to H'01F7FF
H'01F800 to H'01F9FF
H'01FA00 to H'01FBFF
H'01FC00 to H'01FDFF
H'01FE00 to H'01FFFF
Flash memory error
0 Flash memory is not write/erase-protected
(is not in error protect mode)
1 Flash memory is write/erase-protected
(is in error protect mode)
(Initial value)
H8/3048F
Include this register
H8/3048B mask ROM version Not include this register
H8/3048F-ONE
H8/3048ZTAT
H8/3048 mask ROM version
H8/3047 mask ROM version
H8/3045 mask ROM version
H8/3044 mask ROM version
Rev. 3.00 Sep 27, 2006 page 775 of 872
REJ09B0325-0300