HD64F3048VTF8 Datasheet, PDF (395/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 10 16-Bit Integrated Timer Unit (ITU)
10.4.3 Synchronization
The synchronization function enables two or more timer counters to be synchronized by writing
the same data to them simultaneously (synchronous preset). With appropriate TCR settings, two or
more timer counters can also be cleared simultaneously (synchronous clear). Synchronization
enables additional general registers to be associated with a single time base. Synchronization can
be selected for all channels (0 to 4).
Sample Setup Procedure for Synchronization
Figure 10.26 shows a sample procedure for setting up synchronization.
Setup for synchronization
Select synchronization 1
Synchronous preset
Synchronous clear
Write to TCNT
Clearing
No
synchronized to this
channel?
2
Yes
Select counter clear source 3 Select counter clear source 4
Start counter
5
Start counter
5
Synchronous preset
Counter clear
Synchronous clear
1. Set the SYNC bits to 1 in TSNC for the channels to be synchronized.
2. When a value is written in TCNT in one of the synchronized channels, the same value is
simultaneously written in TCNT in the other channels (synchronized preset).
3. Set the CCLR1 or CCLR0 bit in TCR to have the counter cleared by compare match or input capture.
4. Set the CCLR1 and CCLR0 bits in TCR to have the counter cleared synchronously.
5. Set the STR bits in TSTR to 1 to start the synchronized counters.
Figure 10.26 Setup Procedure for Synchronization (Example)
Rev. 3.00 Sep 27, 2006 page 367 of 872
REJ09B0325-0300