HD64F3048VTF8 Datasheet, PDF (321/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

9.10.2 Register Descriptions
Table 9.16 summarizes the registers of port 9.
Table 9.16 Port 9 Registers
Address^* Name
H'FFD0
Port 9 data direction register
H'FFD2
Port 9 data register
Note: * Lower 16 bits of the address.
Abbreviation R/W
P9DDR
W
P9DR
R/W
Section 9 I/O Ports
Initial Value
H'C0
H'C0
Port 9 Data Direction Register (P9DDR)
P9DDR is an 8-bit write-only register that can select input or output for each pin in port 9.
Bits 7 and 6 are reserved. They cannot be modified and are always read as 1.
Bit
7

Initial value
1
Read/Write

6
5
4
3
2
1
0
 P9₅DDR P9₄DDR P9₃DDR P9₂DDR P9₁DDR P9₀DDR
1
0
0
0
0
0
0

W
W
W
W
W
W
Reserved bits
Port 9 data direction 5 to 0
These bits select input or
output for port 9 pins
While port 9 acts as an I/O port, a pin in port 9 becomes an output port if the corresponding
P9DDR bit is set to 1, and an input port if this bit is cleared to 0. For selecting the pin function, see
table 9.17.
P9DDR is a write-only register. Its value cannot be read. All bits return 1 when read.
P9DDR is initialized to H'C0 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting. If a P9DDR bit is set to 1 while port 9 acts as an I/O port, the
corresponding pin maintains its output state in software standby mode.
Rev. 3.00 Sep 27, 2006 page 293 of 872
REJ09B0325-0300