HD64F3048VTF8 Datasheet, PDF(882/903 Page) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

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HD64F3048VTF8 Datasheet, PDF (882/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

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Appendix C I/O Port Block Diagrams

C.10 Port A Block Diagrams

PA n

Reset

R

Q

D

PAn DDR

C

WPAD

Reset

R

Q

D

PAn DR

C

WPA

TPC

TPC

output

enable

Next data

Output

trigger

DMA controller

Output

enable

Transfer

end output

RPA

Legend:

WPAD: Write to PADDR

WPA: Write to port A

RPA: Read port A

Note: n = 0 and 1

Figure C.10 (a) Port A Block Diagram (Pins PA0 and PA1)

ITU

Counter

clock input

Rev. 3.00 Sep 27, 2006 page 854 of 872

REJ09B0325-0300

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