HD64F3048VTF8 Datasheet, PDF (521/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 13 Serial Communication Interface
Communication Formats
Four formats are available. Parity-bit settings are ignored when a multiprocessor format is
selected. For details see table 13.10.
Clock
See the description of asynchronous mode.
Transmitting
processor
Receiving
processor A
(ID = 01)
Serial communication line
Receiving
processor B
(ID = 02)
Receiving
processor C
(ID = 03)
Receiving
processor D
(ID = 04)
Serial data
H'01
(MPB = 1)
H'AA
(MPB = 0)
ID-sending cycle: receiving
processor address
Legend:
MPB: Multiprocessor bit
Data-sending cycle:
data sent to receiving
processor specified by ID
Figure 13.9 Example of Communication among Processors Using Multiprocessor Format
(Sending Data H'AA to Receiving Processor A)
Rev. 3.00 Sep 27, 2006 page 493 of 872
REJ09B0325-0300